UsefulAGKHelper's Achievements
10
Reputation
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It's even worse for my case... because I don't even know how to run acpi ssdt tables .aml from Clover to ensure that my controller is powered on.... (Windows OSI version limit thanks to firmware, it enables and disables values according to OSI) use the SLIC tool to check what acpi tables XP does load for you and check for all informations of your device in the ACPI tables (if it's on a acpi table not loaded by XP, then that explains the issue too). Until then, no ACPI I2C enumeration works for now (mostly my case, yours may just need correct MMIO mapping IDK), not even for me (unless I fake it by enumerating it directly from i2cctrl instead of ACPI, but that would be a fake/virtual device and not the real thing, i'd rather focus on the real device than a virtual device). Keep in mind that this driver was intended to be used on XP (it's adjusted to what it can do on XP) and not on later versions (meaning that it's pure WDM, no KMDF dependency, no sbpcx, no acpiex)... And if you ask why I use i2cctrl.log, it's obvious, this is the only hardware with I2C that I have (it doesn't have serial port, ethernet port for debugging). On crashes I debug the crash in windbg in win11 from xp's memory.dmp (on the same hardware), while outside of BSOD through i2cctrl.log. My controller is I2C IO Cannon Lake based on LPSS, yours is I2C EC based on DW, so maybe the mechanism isn't even the same for you compared to me.
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This is what Copilot said about your BSOD: That blue screen you’re seeing — PAGE_FAULT_IN_NONPAGED_AREA (STOP 0x00000050) — means a kernel‑mode driver or system component tried to access invalid memory. In your context, since you’re testing your I²C controller driver, this BSOD almost certainly originates from a bad pointer or MMIO access inside your backend (for example, dereferencing devctx->MmioBase before mapping or writing to an invalid offset). Here’s how to narrow it down: 🧩 Likely causes Invalid MMIO base — MmioBase not yet mapped when IntelReadReg or IntelWriteReg runs. Null devctx — a failed allocation or uninitialized FDO context. Incorrect BAR offset — writing to a register that doesn’t exist on the ES controller (e.g., LPSS‑only offsets). Accessing pageable memory at IRQL ≥ DISPATCH_LEVEL — common if ISR/DPC touches nonpaged data incorrectly. Removing the code will get you directly back to error 31. The backend is still hardware specific...
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Implementing: /* Intel Serial IO I2C ES (Atom/Cherry Trail/Braswell) */ { L"ACPI\\808622C1", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\808622C2", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\808622C3", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\808622C4", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\808622C5", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\808622C6", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\808622C7", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\808622C8", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE },
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// // Table of supported controllers (explicit ACPI/PCI devices) // Match against full HWID substrings only // const I2CCTRL_DEVICE_ID g_I2cControllers[] = { /* ACPI-based controllers (NO LPSS) */ { L"ACPI\\INT3446", 0x00,0x04,0x08,0x0C, /* BAR0 DW-I2C */ 0,0,0,0, /* LPSS BAR2 */ QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\INT3447", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_FORCE_PIO }, { L"ACPI\\AMD0010", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, { L"ACPI\\AMDI0010", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI20, BSOD_NONE }, /* PCI-based Intel Serial IO controllers WITH LPSS BAR2 */ { L"PCI\\VEN_8086&DEV_9DC5", 0x00,0x04,0x08,0x0C, /* BAR0 DW-I2C */ 0x200,0x204,0x208,0x20C, /* LPSS BAR2 */ QUIRK_NEEDS_RESET_WORKAROUND, BSOD_EXTRA_RESET }, { L"PCI\\VEN_8086&DEV_9DE8", 0x10,0x14,0x18,0x1C, 0x200,0x204,0x208,0x20C, QUIRK_BROKEN_CLOCK_GATE, BSOD_MASK_INTERRUPTS }, { L"PCI\\VEN_8086&DEV_9DE9", 0x20,0x24,0x28,0x2C, 0x200,0x204,0x208,0x20C, QUIRK_NO_DMA_SUPPORT, BSOD_FORCE_PIO }, { L"PCI\\VEN_8086&DEV_9DEA", 0x00,0x04,0x08,0x0C, 0x200,0x204,0x208,0x20C, QUIRK_SLOW_CLOCK, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_9DEB", 0x00,0x04,0x08,0x0C, 0x200,0x204,0x208,0x20C, QUIRK_NO_D1D2, BSOD_NONE }, /* Legacy PCI controllers requiring ACPI 1.0b fallback (NO LPSS) */ { L"PCI\\VEN_8086&DEV_A160", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI10, BSOD_DELAY_INIT }, { L"PCI\\VEN_8086&DEV_A161", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI10, BSOD_DELAY_INIT }, { L"PCI\\VEN_8086&DEV_A162", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI10, BSOD_DELAY_INIT }, { L"PCI\\VEN_8086&DEV_A163", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_ACPI10, BSOD_DELAY_INIT }, /* Other Intel PCI controllers (NO LPSS unless proven otherwise) */ { L"PCI\\VEN_8086&DEV_A2E0", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_A2E1", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_A2E2", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_A2E3", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_31AC", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_31AE", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_31B0", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_31B2", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_31B4", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_31B6", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_31B8", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_31BA", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_A368", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_A369", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_A36A", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_A36B", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_02E8", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_02E9", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_02EA", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_02EB", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_02C5", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_02C6", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_06E8", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_06E9", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_06EA", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE }, { L"PCI\\VEN_8086&DEV_06EB", 0x00,0x04,0x08,0x0C, 0,0,0,0, QUIRK_NONE, BSOD_NONE } }; const ULONG g_I2cControllersCount = sizeof(g_I2cControllers) / sizeof(g_I2cControllers[0]); This is the list of supported controllers in i2cctrl.c.
