SweetLow

There is exact answer your question. Stan Mitchell, Inside the Windows 95 File System,1997

https://github.com/oerg866/win98-quickinstall/issues/22#issuecomment-4488077576 RLoew's Terabyte Plus 3.0 ESDI_506.PDR data corruption bug. Fix: http://sweetlow.orgfree.com/download/esdi_506_tbp3.zip

0. Use the newest versions of ESDI_506.DPR & AHCI.PDR too. 1. C:\WINDOWS\SYSTEM is not need, of course. 2. Literally few days ago when I solved problem of executing ATA commands (like setting PATA transfer mode for PATA device on SATA Host - PATA Device bridge) I made the dumper of IDENTIFY info without using smartvsd.vxd interface too, so for the first take: https://github.com/LordOfMice/Tools/blob/master/atainfo.zip unzip content and run DumpIDENTIFY.exe. You should get 3 .DAT files and no errors or warnings. 3. If success on step 2 then try to use SMARTInfo - this is the same thing as DumpIDENTIFY but with smartvsd.vxd interface using. You have to get IDENTIFY.DAT dumps too and no errors.

If you said that 98SE ESDI_506.PDR 4.10.2225 works in 95 OSR2 then it is half of work as ESDI_506.PDR from TBP should work in 95 OSR2 too.

Now reread my post about what Rloew did and what he didn't. >Interesting, it is also not tied to single vendor drives? Yes, it's generic.

Requirement for patch is NOT what patch does, I assume it is obvious. And you continue skipping some parts of information. Take it all. MANUAL.TXT -> HARD DRIVE SIZE LIMITS None of them. And it does not use even one byte of memory after it did its work.

I assume no Rloew neither LLXX released ATA 48-bit LBA drivers for 95/98FE/ME, 32-bit only. 48-bit ATA commands used internally of course, but processed LBA in driver restricted to 32 bits. The real ATA 48-bit LBA drivers are available in Terabyte Plus Pack for 98SE only as RLoew never released generic 48-bit patch (but referenced it in some manuals). If there is no hang during boot, only size restriction in BIOS than it can be fixed to view full size under Windows probably. I made very similar patch for fixing problems in BIOSes for >128GiB/2TiB drives like using LBA 28-bit only size or wrap-around the size of >2TiB drives.

http://sweetlow.orgfree.com/download/SiI0680.zip Take \NEW\ATA0106.INF version for the first. If it will not work - make new version of devtree.txt WITH INSTALLED driver and resend it.

Ok, CC_010600 is "Serial ATA controller - vendor-specific interface". It is unusual for PATA controller. But no matter, use RLoew's ATA0106.INF from Terabyte Plus Pack with patched ESDI_506.PDR. If you sent me info I asked I could verify that this .INF really will work on your hardware but you continue to ignore some parts of request.

SUBSYS (subsystem) and CC (class code) are definitely different things. Looks like it will be endless with SUCH approach. Ok, get: https://github.com/LordOfMice/Tools/blob/master/devtree.zip run devtree.exe /vv /p > devtree.txt in console and put result (devtree.txt file with size ~ few tens of kilobytes) somewhere to download

Well, knowing now internals of ESDI_506.PDR I solved this puzzle completely from the second attempt (the first attempt was disabling IOR_IDE_PASS_THROUGH handler to prevent BSoDs): IDENTIFY (including ATAPI devices) and SMART commands work in AHCI.PDR Plus fixed few other bugs seen in process of main development, I personally recommend to pay attention to N5. http://sweetlow.orgfree.com/download/ahci.zip readme: Patches of RLoew's AHCI.PDR 3.0 1. Fixed broken handler of information about internal structures (system hangs/reboots when trying to read them). 2. Fixed accessing an uninitialized pointer variable (wild pointer) in the power-down handler (SYS_POWER_DOWN) leading to BSoD / hang-on / reboot. Thanks to https://github.com/PluMGMK 3. Fixed bug in the handler for ATA commands without data transfer, such as standby drive or working with removable media. These commands were previously just not executed. 4. Made new working handler of IOR_IDE_PASS_THROUGH request, IDENTIFY (including ATAPI drives) and SMART commands are supported. 5. Fixed random CPU port write access in some cases on executing Input/Output Request. 6. Fixed bug in enable Media Status Notification function. 7. Memory copy speedup in Input/Output Request handler.

MSINFO32, REGEDIT Be careful, you can not get simple information after third iteration and ignores some data for unknown reason. It is not smart behaviour.

1. SiI controllers have 3 modes - pure ATA, non RAID and RAID. 2. I assume it simpler to see the data than post on forum.

PCI IDs, including Class, Subclass and Protocol like this --- Bus 01, Device 0B, Function 00 - Silicon Image, Inc. RAID Controller --- PCI\VEN_1095&DEV_3112&REV_02&CC_010400

There are special .INFs from RLoew or me for ATA controllers in PCI Native Mode or non-RAID mode of SiI controllers (check what you really have BTW). Sometimes it works without them but it is better with.

Real PCI ATA controllers work in PCI Native mode so usual ESDI_506.PDR will not work. You need something like RLoew's "SATA" patch but IDK does it work for 95.

Yes, it's possible to do this. But 1. it is not clear result as you do calibration of CPU wait loops in one mode (fast with caching) and then use this waits in other mode (very slow without caching). That's why I slow down system before starting Windows, not in running Windows. 2. It is not works always. For example trying to disable WC for non-local buffer in system memory on Radeon PCI-E cards (direct emulation of AGP behaviour) leads to immediate freeze. Because it is DMA working, CPU less involved.

No, processor caching control is not PCI entity. You can use my package for MSR & MTRR processing (and just use MTRR_RST.EXE from it now) or use "CPUSPD cd" for example for disabling caching in CR0 control register.

I booted to DOS prompt and disable cache (two methods used - through MTRRs or through cache control bit in CR0) and then run Windows - for clean result. Booting is painfully slow but possible nonetheless. P.S. AFAIK this does not disable caching of SM area but I can't imaging scenario that can influences HDA controller using.

JFYI. IDK about any other system but now I can say that definitely on my Intel Core gen 10 system I have some other problem than cache coherence and so No-snoop bits in chipset or PCI-E device or elsewhere (or I completely misunderstand all things). To verify this I remembered one test that I used to try to insulate VCACHE problem on newer systems and I just run my system without caching on the processor side at all And lo and behold - nothing changes, the same short loops in the end.

No BSOD, no hardware problem after reboot, but the same short loops on Core gen10 system.

... few days after asking the right, cleared from other factors result of those reading speed

That is the source of problem with original driver. You have to connect your CD-ROM exactly to SATA ports 0-3 (ATA channels 0-1) that only can work in Legacy Mode on this chipset. And on SATA controller and PATA device it is possible too with help of the PATA-SATA converter, but not on addidional PATA controller port on the motherboard as it works in PCI Native Mode always.

Much simpler. All Windows 9x users now is 40+ old by default, no need to verify anything